CSP (chip scale package or chip size package) is a package that has an area of not more than 120% of the die. It is suitable for compact 2nd-level packaging efficiency. With better protection by ruggedized encapsulation and better 2nd-level reliability (or board level reliability), CSP prevails over the direct chip attach (DCA) and chip on board (COB) technology. This package makes the IC sturdy enough for easier handling, and testability. Providing low-cost test and burn-in, CSP is a substitute for known good die (KGD) with comparable electrical performance. In addition to required signal and power transmission contacts, some CSPs provide a direct thermal path for heat removal from the chip. The applications of CSP include memory ICs, RFICs, and communication ICs.

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